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Several early computer designs regarded a 'word' as representing not an integer, with the bits having values 2^0, 2^1, 2^2, ..., but as representing a fixed-point fraction 2^-1, 2^-2, 2^-3, ...

(For the sake of simplicity in this question I'm ignoring the existence of the sign bit and talk only in terms of positive numbers)

Some examples of this convention are EDVAC, EDSAC, and the IAS machine.

Why was this? To me, having dealt with since the 1970s with machines that have "integers" at base, this seems a strange way to look at it.

Does it affect the machine operation in any way? Addition and subtraction are the same regardless of what you think the bits mean, but I suppose that for multiplication of two N-bit words giving an N-bit result, the choice of which N bits to keep depends on your interpretation. (Integer: you want the "right hand word"; fixed-point fraction, you want the "left hand word").

I'd think that it was mostly down to the preferences of John von Neumann at the time. He was a strong advocate of fixed point representations, and early computers were designed with long words to accommodate a large range of numbers that way. You certainly don't need 30-40 bits to cover the most useful integers, but that many were needed if you wanted plenty of digits before and after the decimal point.

By the 1970s though, the costs of integration were such that much smaller word sizes made sense. Minicomputers were commonly 16 bit architectures, and micros 8 bits or sometimes even 4. At that point you needed all the integers you can get, plus floating point had largely replaced fixed point for when you needed decimals.

Nowadays we'd think nothing of using 64 bit integers, of course, but it's a heck of a lot easier to integrate the number of logic gates required for that than it would have been back when they all had to be made out of fragile and expensive vacuum tubes.